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職責(zé)描述： 1. Carry out process integration development responsibility of new memory technologies such as PCM, FeRAM, MRAM and ReRAM 2. Coordinate wafer/lot and experiment management, handle fab excursion and ensure smooth project execution 3. Evaluate routine offline, inline, WAT, SORT, reliability and backend data to solve problem and draw conclusion/decision 4. Take ownership of process flow loop related to new memory cell development, and evaluate new process and integration scheme to meet memory cell spec 5. Design and manage process and device experiments to analyze, extract, report and conclude to optimize critical processes and define follow-up actions 6. Lead/Participate in test chip tapeout for new memory technology development and product chip tapeout for production introduction 7. Interact with process module, material, simulation, device characterization and reliability group to optimize process flow, improve memory cell device performance and develop innovative solution to meet product requirement and qualification criteria 8. Drive cross-functional team including process module, device, product engineering, design, YE, YAE, TO, and Test to address process/technology gap and yield/margin issues 9. Review technical literature to gain in-depth understanding of project related topics and guide problem solving and development direction. Contribute to project IP pool 任職要求： 1. MS or PhD in Electrical Engineering, Physics, Material or other related technical field is required, or BS 3 years experience in engineering or related discipline 2. Familiar with semiconductor fabrication process, material, physics, device and concepts. 3 years of Process Integration and/or Process Development desired 3.Prior experience in advanced semiconductor fab R