職位描述
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職責描述:
1. Carry out process integration development responsibility of new memory technologies such as PCM, FeRAM, MRAM and ReRAM
2. Coordinate wafer/lot and experiment management, handle fab excursion and ensure smooth project execution
3. Evaluate routine offline, inline, WAT, SORT, reliability and backend data to solve problem and draw conclusion/decision
4. Take ownership of process flow loop related to new memory cell development, and evaluate new process and integration scheme to meet memory cell spec
5. Design and manage process and device experiments to analyze, extract, report and conclude to optimize critical processes and define follow-up actions
6. Lead/Participate in test chip tapeout for new memory technology development and product chip tapeout for production introduction
7. Interact with process module, material, simulation, device characterization and reliability group to optimize process flow, improve memory cell device performance and develop innovative solution to meet product requirement and qualification criteria
8. Drive cross-functional team including process module, device, product engineering, design, YE, YAE, TO, and Test to address process/technology gap and yield/margin issues
9. Review technical literature to gain in-depth understanding of project related topics and guide problem solving and development direction. Contribute to project IP pool
任職要求:
1. MS or PhD in Electrical Engineering, Physics, Material or other related technical field is required, or BS 3 years experience in engineering or related discipline
2. Familiar with semiconductor fabrication process, material, physics, device and concepts. 3 years of Process Integration and/or Process Development desired
3.Prior experience in advanced semiconductor fab R
1. Carry out process integration development responsibility of new memory technologies such as PCM, FeRAM, MRAM and ReRAM
2. Coordinate wafer/lot and experiment management, handle fab excursion and ensure smooth project execution
3. Evaluate routine offline, inline, WAT, SORT, reliability and backend data to solve problem and draw conclusion/decision
4. Take ownership of process flow loop related to new memory cell development, and evaluate new process and integration scheme to meet memory cell spec
5. Design and manage process and device experiments to analyze, extract, report and conclude to optimize critical processes and define follow-up actions
6. Lead/Participate in test chip tapeout for new memory technology development and product chip tapeout for production introduction
7. Interact with process module, material, simulation, device characterization and reliability group to optimize process flow, improve memory cell device performance and develop innovative solution to meet product requirement and qualification criteria
8. Drive cross-functional team including process module, device, product engineering, design, YE, YAE, TO, and Test to address process/technology gap and yield/margin issues
9. Review technical literature to gain in-depth understanding of project related topics and guide problem solving and development direction. Contribute to project IP pool
任職要求:
1. MS or PhD in Electrical Engineering, Physics, Material or other related technical field is required, or BS 3 years experience in engineering or related discipline
2. Familiar with semiconductor fabrication process, material, physics, device and concepts. 3 years of Process Integration and/or Process Development desired
3.Prior experience in advanced semiconductor fab R
工作地點
地址:武漢洪山區(qū)湖北省武漢市洪山區(qū)東湖新技術(shù)開發(fā)區(qū)未來三路IGE產(chǎn)業(yè)孵化基地一期16號樓
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詳細位置,可以參考上方地址信息
求職提示:用人單位發(fā)布虛假招聘信息,或以任何名義向求職者收取財物(如體檢費、置裝費、押金、服裝費、培訓費、身份證、畢業(yè)證等),均涉嫌違法,請求職者務必提高警惕。
職位發(fā)布者
Alic..HR
長江存儲科技有限責任公司
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電子技術(shù)·半導體·集成電路
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1000人以上
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公司性質(zhì)未知
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東湖開發(fā)區(qū)高新四路18號
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5年以上
碩士
2026-03-09 22:41:54
484人關(guān)注
注:聯(lián)系我時,請說是在四川人才網(wǎng)上看到的。
